PCB/Hybrid/RF Layout

Pantheon is Intercept's highly-advanced PCB design application, with specialized user flows for RF and Hybrid designers. Read schematic information into Pantheon from Mozaix and create the most complex designs with Pantheon's interactive features and double-verification process.

Double verification is the process of applying comprehensive and rigorous checks to ensure the integrity of your design from layout to artwork. Pantheon's on-screen WYSIWYG features allow you to check the design's PCB and manufacturing databases before the design goes to production, which can eliminate any costly errors before fabrication. 

Pantheon also includes flexible violation display so that any error can be quickly identified and corrected. Using the DRC Violation Report dialogs or the view by index option, users can pan through errors based on index number or category. 
 
Pantheon displays the error using red arrows and prints a message describing the specific violation. The double verification process improves design quality, shortens the development cycle, and reduces the risk of manufacturing delays due to re-design. Design Rule Checks (DRCs) verify the design on the layout side, using standard and/or customized design rules, including complete database DRCs for components, routing, net topology, fills, high speed, teardrops, testpoints, geometries, placement, and physical layers for a design. While designing, Pantheon interactively checks the database against these predefined rules, helping the user to create an error free layout. 
 
Double Verification refers to artwork verification, even after the layout has been fully verified by DRCs. No other design application in the industry offers this capability. The first pass of artwork checks is the Electrical Rule Checks (ERCs), which verify that all connections in the layout are also properly made in the artwork. This is done by creating a netlist exclusively for the artwork (called a node list) and comparing it to the layout. The resulting report includes net mismatches, shorts, opens, extra or missing pins, and extra vias. The second pass of artwork checks is the Manufacturing Rule Checks (MRCs). These are a set of customizable rules that check clearance, coverage, and power/wire violations from the manufacturing standpoint. Pantheon's manufacturing verification contains a complete matrix of object clearance checks, including verification of annular rings, antipads, and soldermask coverage. 

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Pantheon’s advanced layout design system has always offered full artwork and manufacturing checks (DFM) in its core application, which include detailed Electrical Rule Checks (ERCs) and Manufacturing Rule Checks (MRCs) that are performed even after the layout passes standard Design Rule Checks (DRCs). Through a process called double verification, Pantheon first generates a net list from the artwork and runs a one-for-one comparison to the layout. This comparison will identify net mismatches, shorts, opens, extra or missing pins, and extra vias.

The second pass of artwork checks is the Manufacturing Rule Checks (MRCs, or DFM). These are a set of customizable rules that check clearance, coverage, and power/wire violations from the manufacturing standpoint. Pantheon's manufacturing verification contains a complete matrix of object clearance checks, including verification of annular rings, antipads, and soldermask coverage. With a triple-pass set of rules checking, Pantheon offers the highest level of design integrity checks in the industry.

Pantheon offers the ability for a group of designers to complete portions of a board concurrently using block technology, or physical hierarchy. This technology aids floorplanning by allowing a physical layout to be divided into actual physical blocks. One master layout can be divided into many separate circuits, which can then be converted into block geometries. These geometries can be designed independently of one another; block geometries are treated like independent boards, and use the same technology rules and design rule checks to make it easy to verify each section of a master layout prior to updating it to the master layout. When a block is updated to a master design, changes automatically update on the master. This method of using physical hierarchy allows any number of designers to work at the same time, reducing design time exponentially. 

Block geometries can be placed any number of times in a master design, reducing repetitive edits. In the same vein, each individual block’s hierarchy can also be flattened, meaning that the circuitry can be merged to become part of the master board instead of its own geometry. This allows circuitry to be manipulated separately from its original block geometry.

Completion of a master layout is also made easy with a flexible connectivity model that allows connections to be made from block to block or board to block, making routes to and from blocks transparent. Once each block is complete and updated to the master layout, the complete board can be checked with standard verification, and artwork generation and fabrication. 

Design integrity is easily maintained from schematic to layout using physical hierarchy. This hierarchy is mimicked in the schematic as well, making the connectivity relationship between schematic and layout one for one. With block designs in the schematic also represented as block designs in the layout, teams of schematic designers can work concurrently on separate block designs just as teams of layout designers can work on the physical block designs. Updates and annotations from schematic designs to board designs are simple and easy, and the one for one relationship is maintained from each schematic/board design to the final master design.

Pantheon is Intercept's highly-advanced PCB/Hybrid/RF design application. Read schematic information into Pantheon from Mozaix and create the most complex designs with Pantheon's interactive features and double-verification process.

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Today's RF designers require extensive use of unique and seemingly arbitrary copper shapes. In Pantheon, users have powerful capabilities to easily manipulate and create area fill and primitive shapes.

When creating/editing shapes and fills, users can slice, merge, grow, shrink, add/remove vertices, create cutouts, flip, rotate, chamfer, or copy/paste any fill for unsurpassed performance and manipulation.

Tell us more about your EDA PCB/Hybrid/RF software needs.

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